Programmable sequential controller with function expansibility


PURPOSE: To store an I/O data memory unit and an I/O flag memory unit with data, etc., in charge of other controllers, by providing said units to each programmable sequential controller (PC) connected in parallel. CONSTITUTION: In a PCj, an I/O unit 22 is connected to input and output elements of a machine device MTj. An interface unit 24 buffers I/O data between the I/O unit 22 and an I/O data memory unit 34. A program memory unit 26 is stored with a group of sequence program instructions. An arithmetic unit 28 fetches program instructions from the unit 26 and performs necessary arithmetic processing. A memory unit 34 has sectioned memory areas 0WN as many as parallel connected PCs, and in each memory area, data on logical states of input and output elements that each machine device MTj is in charge of are stored. COPYRIGHT: (C)1983,JPO&Japio




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Patent Citations (1)

    Publication numberPublication dateAssigneeTitle
    JP-S582904-AJanuary 08, 1983Omron Tateisi Electronics CoProgrammable logic controller

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